A common method for error control in asynchronous communications and primary storage. Prior to transmitting or storing an array of bits, such as an ASCII character, a device, such as a PC, adds the marks, or 1 bits, that compose the seven-bit character to determine if their total value is an odd or even number. If the number is even and the machine is set for the default odd parity, it will append a 1 bit in the eighth bit position.The device that either retrieves or receives the character performs the same operation on the data. If the parity is odd, the machine assumes that the character is unerrored.There are two variations on the theme of parity checking.Vertical redundancy checking (VRC) is the simplest and least reliable. Longitudinal redundancy checking (LRC) is more complex and much more reliable. Neither, however, provides any inherent error correction mechanism. See also error control, LRC, recognition and flagging, and VRC.